Knowledge Base
/kb_dl.aspx/KB/gamemanuals/cineex/cables.ps.tiff
-1 - Tue Oct 14 13:09:50 1997 8 I 7 I 6 I 5 4 I 3 I 2 I 1 . REVISIONS REV ECO DESCRIPTION DRAFT DATE APPROVEC A RELEASED SHIELD BLK BLU BLK GRN BLK —4 BCLIP1 ->PLG_U14—1 ->PLG_U14—2 ->PLG_U14—3 ->PLG_U14—4 ->PLG_U14—5 ->PLG_U14—6 ->PLG_U14—7 ->PLG_U14—8 ) 7LG_U14—9 ) rLc_u14—10 > ELG_U14—11 - ELG_U14—12 -) RG_U14—13 _C_U14—14 -C_U 14—15 “LC_U14—16 P1—i EP1—2 EP1—3 EP1—4 EP1—5 EP1—s EP1—7 EP1—8 <— — <Ji—9 CBL_P1—9 < — SHIELD P1—9 <— — <Ji—8 CBL_P1—8 < — BLK 5555 - P1—10 <— — <Ji—7 CBLP1—7 < — BLU CCCC P1—il
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/kb_dl.aspx/KB/gamemanuals/cineex/cables.ps.tiff
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1998.02.25
Wintron Amplifone X/Y monitor replacement Hi-V Transformer Information
Submitted by Dave Fish
Just got off the phone with the engineer at Wintron who designed the replacement Hi-V transformer for the Amplifone X/Y monitor. It seems that the documentation which was sent out with some of the transformers a while back had some errors in it. He faxed me out a copy of the newer drawing which has a date of September 19, 1996. With Rick's permission here are the correct connections:
Wintron Drawing #26862802 Lead connections: [COLOR Pin # Signal] RED - 9 - B
File:
/kb_dl.aspx/KB/gametech/wintronhvtrans.html
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2000.01.19
/kb_dl.aspx/KB/datasheets/z80/z80ctc07.tiff
Timing Read Cycle Timing. Figure 9 shows read cycle timing. This cycle reads the contents of a down-counter without disturbing the count. During clock cycle T2, the Z-80 Cpu initiates a read cycle by driving the following inputs Low: ED, IORQ, and CE. A 2-bit binary code at inputs CS1 and CS0 selects the channel to be read. Ml must be High to distinguish this cycle from an interrupt acknowledge. No additional wait states are allowed. CLK 1, T2 TWA T3 T, CS0, CS,, CI JIi.NNEL ADDRESS Figure 9. Read Cycle Tim
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/kb_dl.aspx/KB/datasheets/z80/z80ctc07.tiff
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472
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1997.08.25
/kb_dl.aspx/KB/datasheets/z80/z80ctc05.tiff
Programming Trigger Mode (Timer Mode Only). D3 selects (Continued) the trigger mode for timer operation. When D3 is reset to 0, the timer is triggered automatically. The time constant word is programmed during an I/O write operation, which takes one machine cycle. At the end of the write operation there is a setup delay of one clock period. The timer starts automatically (decrements) on the rising edge of the second clock pulse (T2) of the machine cycle following the write operation. Once started, the timer
File:
/kb_dl.aspx/KB/datasheets/z80/z80ctc05.tiff
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618
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1997.08.25
Cinematronics C.P.U. Exorcisor Preliminary User Manual
C.P.U. EXORCISOR
PRELIMINARY USER MANUAL
David Fish
October 14th, 1997
Version 1.0
Table of Contents
Overview 3
Cinematronics Exorcisor Description 3
Signature Analysis 3
Equipment Necessary 3
Setting up the Equipment 4
HP5004A Self-test 4
Connecting the HP5004A Signature Analyzer to the Exorcisor 5
Verifying the Exorcisor output signatures 5
Preliminary CPU Operational Testi
File:
/kb_dl.aspx/KB/gamemanuals/cineex/exor_man.doc
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2002.09.24
/kb_dl.aspx/KB/gamemanuals/cine/batheoryop4.tiff
performing 16 arithmetic operations determined by inputs SO, Si, S2 and S3. These inputs re decoded by devices K2. K4 and J8. The operations piocess either of the A and 13 AI.U inputs. The carry outputs (lo) are tied to look-ahead carry device IA to he discussed later. After the operation has been performed the outputs from these ALU devices (FO-F 11) are then fed to the primary and secondary accumulaters provide two functions: a Y and an X shift register. and arithmetic accumulators. The primary accumulato
File:
/kb_dl.aspx/KB/gamemanuals/cine/batheoryop4.tiff
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1998.03.22
1996.09.29 GUIDE TO LOWER MAINLAND ARCADES
VERSION 1.0a : 1996.09.29 by Glenn Tarigan Additional comments by "Moby" Henry Kong Andrew Chang Feel free to distribute this document. Make sure the credits remain intact. I'd like to get some comments, especially from people who have been to any of the arcades mentioned here. What can I do to improve this guide? Do you have any details or opinions to add? Note: "Lower Mainland" refers to a southwest portion of British Columbia, Canada. The major arcades listed so far
File:
/kb_dl.aspx/KB/faqs/faq-1996 lwr mainland arcades.html
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2000.02.20
/kb_dl.aspx/KB/gamemanuals/cine/cpu2of6.tiff
8 7 I 6 4 I 3 1 74LS00 4 (586) X,ARITH J6 6 74LS00 O J6 8 74LS00 (2C3,6A4) 3 IS ISA ISA 2 J6 ,43J2,LI sO 112 3 4 IS 74L510 (3D3) CUc2.rL5 (5C3)> (2C5,6A5) PA PA PA PA 7654 12 13 14 15 QDQC BQA SLIN SO I0 II 2 12 (2C3,6A4) PA PA IPA PA 43 ,t\24 /%O f12 113 j14 DRAWN By: IDATE . HURLET [2-7 PROJECT ENGR: bATE ciL RELEASE APPROj DATE DO NOT SCALE DWG TOLERANCE: UNLESS )?HERWISE SPECIFIED PROJECTION: SCALE: -B3- -. A.CAJE 5 REVISIONS REV DESCRIPTION DATE APPROVED (5D) > SECONDARY (307, 3A7, 4C3) (3C5,3A6,4D3) (
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/kb_dl.aspx/KB/gamemanuals/cine/cpu2of6.tiff
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94
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1998.03.22
/kb_dl.aspx/KB/gamemanuals/cine/tgmonhv.tiff
H.VIIUN R i I 110 iJ3 I .72 II —251’ 5&f CAUTION SKII I. I IR*h CR I 1114003 L12 1C13 133 IC-I Ictø TJJ1 T’ iL_1 BRN(8) ‘‘ —K BLK(I) j—<TTGRIDI GRN (2) TI T T’ I .1? Jca J•1o4 T2.? T Jc1i T BLU (4) rO_1 CR10 RI4 M21-t f—<EJGRID4 cRT CA1 ..RED(3) C NeTI) F GRID 2 RIO 4 TM CI.T L. s I LtCt T ioo4 or I 1Q4 — ç?l.I Ill do i, COt 0’I -t,z LI _1CI1 jc i T 4. lIIF]OVI.—9 T.’9I&r ALL CAPACITOR YALIIKS 4P.E IN MICAOFARAD5 ALL RISTOR va.vas 40% is OIIM v(s ogpw,s4,JgrfO NOT% RIt+TlIitvRIZ, 4149 RZZOTHR’J 0t29 44, com
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/kb_dl.aspx/KB/gamemanuals/cine/tgmonhv.tiff
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1998.03.22
/kb_dl.aspx/KB/gamemanuals/atari/blackwidow11b.tiff
Lii 1’%AC_I P1 WI NOTICE TO ALL PERSONS RECEIVING THIS DRAWING CONFIDENTIAL: Reproduction forbidden without the specd;c :rten permission of Atari, Inc., Sunnyvale, CA. This drawing Is oril conditionally issued, and neither receipt nor possession thIreof confers or transfers any right in, or license to use, the subject matter of the drawing or any design or technical inforinatior S1iOifl thereon, nor any right to reproduce this drawing or any pact thereof Except for manufacture by vendors of Atari, Inc. and
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/kb_dl.aspx/KB/gamemanuals/atari/blackwidow11b.tiff
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1998.04.07
/kb_dl.aspx/KB/gamemanuals/atari/spaceduel3b.tiff
+ 5V I WB 802 Sheet BA Vector Address Decoder • Vector Read-Only Memory DBO-OB7 Ve:nF:::try Vector Memory Data _______________ Buffer IAVG0-AVG12) TO COIN DOOR TOCONTROL PANEL NOTICE TO ALL PERSONS RECEIVING THIS DRAWING CONFIDENTIAL: Reproduction forbidden without the specific written permission of Atari, Inc., Sunnyvale, CA. This drawing is only conditionally issued, and neither receipt nor possession thereof confers or transfers any right in, or license to use, the subject matter of the drawing or any de
File:
/kb_dl.aspx/KB/gamemanuals/atari/spaceduel3b.tiff
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1998.04.07
/kb_dl.aspx/KB/gamemanuals/cine/cpu1of6.tiff
8 I 7 I 6 I 5 4 I 3 ____— Sk SI’ —- SI, q ______—s.r _______— SIc —- $15 S-f’. / 2A41 T4L3t4 56 4Liô0 2 3 (/1:3) 7 lIZ + 74L5O2 14 /2 I! -: J 74L5/O7 52 0 3 1/ ‘7 , H J 7415/07 82 P-&IAl 74LOo , / 2 /2/3 rZL5OI) 74L3IiO 3. _14-// ,O J4./2 (7’ 0— J4-13 (/1:5) Oz 0— R-7/N --“ 7 03 0— ‘I’ ? 04 0— I READ (5&) 06 /1 \L J4-/fo i 74L527 07 5 ii /1 ‘ 6’ 9 Bfl)C?fT U, C Ab 74£ 5o2 i21’TPtJT C’ONTROL 5 /1, RE4D-X (.5C23 / V 74.51/3 H/ LT if 74L5//3 2 I ___ ____ /2/3 i2 / T4L52TJ ir4J 74L/0 /2 /2 (/2W34 iz /JT (3A4) ?
File:
/kb_dl.aspx/KB/gamemanuals/cine/cpu1of6.tiff
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1998.03.22
/kb_dl.aspx/KB/gamemanuals/atari/majorhavoc9b.tiff
1101 uDA-c’ —-1T 4R _Lcj US I LO4- r=’5 R/W 4- YrJc o8P (oSOZ-A tJMl AiS t( A14 c0. A( All AIG AS A—i A4 AZ. At Al31 2c AI2( 2 4t1f 2:3 AIc”f 2.1 •A4 24 Ae 2s A7U Ac2’f 4 A51 5 44’f ‘ A1 7 A24 8 A11 A’ to M07’( - -f-SV 1 271 vPP AI3 271283 lø S A9 A7 *4 AS Al Ac D7 D4 D3 DZ Dl C.E OE — aol 221 Al5I—J L Gamma (y) Microprocessor Al5-Al ff ‘f L2. DuTPQT,l W(TE ‘f __LJ,fr LSSZ ,LQ PoRTI.D 4 ,12 TT.5I’.ID F-rw’ E-rRO6 — Alpha (cx)IGamma (‘y) Communication Port MC7f 2. A( 4 N40 iAC4i 8 II -40Z( g:3 r..4D1 .,- 5 1
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/kb_dl.aspx/KB/gamemanuals/atari/majorhavoc9b.tiff
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1998.04.06
/kb_dl.aspx/KB/gamemanuals/atari/4pfb2a.tiff
The address decoder outputs the scroilfield write enable signal SFWR, and the microprocessor. selects the appropriate RAM pair with address lines ABUSO and ABUS5. ____ +5J OUTØ In 20 CK 6 “0 s (b 2b LS4 Sp BQ F/F 3t 3Q 7D 7Q 40 OC (?l 110 F—1, R5 s:i:. Sheet 2, Side A DP-139-02 1st PRINTING !‘ 2C3 2 C2 2C1 2C0 L5153 l”3 DATA SELl Ic2 I CI VIDEO GENERATOR SFRDA SFRDB 1t4 2 C3 2(2 2Y 2C1 zc L5153 I (3 DATA SELl 1(1 MLIX ILl I Cø I a SFRDA SFRDS 2(3 2C2 2(1 zc L5153 1C3 DATA SEL/ Ic2 IbIUX IC’ I (0 I 2 SFRDA S
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/kb_dl.aspx/KB/gamemanuals/atari/4pfb2a.tiff
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1998.04.07
IC List
Timing information for ICs is not yet available, and only TTL, 4000-series CMOS and some microprocessor (support) chips are included. For now, it is not clear how the format used can be extended to include linear ICs, as these usually require much more additional information such as a block diagram. The current file uses the PC8 character set (a.k.a. codepage 437), but can be converted to 7-bit ASCII without too much trouble (losing some niceties). As it is, it is small and simple enough to keep it in you
File:
/kb_dl.aspx/KB/faqs/list-iclist.html
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311
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1999.10.29
/kb_dl.aspx/KB/gametech/cinematronics-history.txt
THE HISTORY OF CINEMATRONICS AND A DESCRIPTION OF THEIR VECTOR GAMES
--------------------------------------------------------------------
COPYRIGHT 1994, 1995
REVISION NUMBER: 2.0
REVISION DATE: 23 December 1994
REVISION HISTORY: 1.0 (02/11/92 - First attempt at listing and ordering
all Cinematronics games.)
REVISION HISTORY: 2.0 (12/23/94 - Rearranged sections, added new sections
for Barrier, Speed Freak, Boxing Bugs,
File:
/kb_dl.aspx/KB/gametech/cinematronics-history.txt
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50
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1994.12.28
Search the following for T2
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